DocumentCode
2609464
Title
AltiVecTM: bringing vector technology to the PowerPCTM processor family
Author
Tyler, Jon ; Lent, Jeff ; Mather, Anh ; Nguyen, Huy
Author_Institution
Motorola Inc., Austin, TX, USA
fYear
1999
fDate
10-12 Feb 1999
Firstpage
437
Lastpage
444
Abstract
Motorola´s AltiVecTM Technology provides a new, SIMD vector extension to the PowerPCTM architecture. AltiVec adds 162 new instructions and a powerful new 128-bit datapath, capable of simultaneously executing up to 16 operations per clock. AltiVec instructions allow parallel operation on either 8, 16 or 32-bit integers, as well as 4 IEEE single-precision floating-point numbers. AltiVec technology includes highly flexible “Permute” instructions, which give the data re-organization power needed to maintain a high level of data parallelism. Fine grained data prefetch instructions are also included, which help hide the memory latency of data hungry multimedia applications. All of these features add up to a dramatic performance improvement with the first implementation of AltiVec technology: routines written with AltiVec instructions can execute significantly faster sometimes by a factor of 10 or more, than traditional scalar PowerPC code. Yet AltiVec technology is flexible enough to be useful in a wide variety of applications
Keywords
computer architecture; floating point arithmetic; microprocessor chips; vector processor systems; IEEE single-precision floating-point numbers; Motorola AltiVec; PowerPC processor family; SIMD vector extension; fine grained data prefetch instructions; vector technology; Bandwidth; Clocks; Delay; Frequency; Microprocessors; Pipelines; Power generation; Prefetching; Registers; USA Councils;
fLanguage
English
Publisher
ieee
Conference_Titel
Performance, Computing and Communications Conference, 1999 IEEE International
Conference_Location
Scottsdale, AZ
ISSN
1097-2641
Print_ISBN
0-7803-5258-0
Type
conf
DOI
10.1109/PCCC.1999.749469
Filename
749469
Link To Document