DocumentCode
2609490
Title
Performance analysis for chipsets and systems
Author
Lutz, David R. ; Kahne, Brian
Author_Institution
Motorola Somerset Design Center, Austin, TX, USA
fYear
1999
fDate
10-12 Feb 1999
Firstpage
445
Lastpage
450
Abstract
Plasma is a new tool for modeling the timing of chipsets and other system components. Modeling chipsets is in some ways more difficult than modeling processors: the interfaces are more complex and more numerous, the internal queues and buffers are larger, and the traces are much more complicated. We have used Plasma to create a timing model for a modern chipset. The resulting model is fast, flexible, and useful for both design and verification
Keywords
microprocessor chips; timing; Plasma; buffers; chipsets; internal queues; performance analysis; timing; Automata; Buildings; Computer languages; Job design; Performance analysis; Pipelines; Plasma simulation; Process design; Programming; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Performance, Computing and Communications Conference, 1999 IEEE International
Conference_Location
Scottsdale, AZ
ISSN
1097-2641
Print_ISBN
0-7803-5258-0
Type
conf
DOI
10.1109/PCCC.1999.749470
Filename
749470
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