Title :
On the specification and synthesis of hazard-free asynchronous control circuits
Author_Institution :
Cirrus Logic, Fremont, CA, USA
Abstract :
Two related approaches to the specification and synthesis of hazard-free asynchronous control circuits are described. The first approach is based on signal transition graphs (STGs), a type of interpreted Petri nets. The second is based on a subclass of state machines called asynchronous finite state machines (AFSMs)
Keywords :
Petri nets; asynchronous circuits; finite state machines; logic design; signal flow graphs; finite state machines; hazard-free asynchronous control circuits; interpreted Petri nets; signal transition graphs; state machines; Asynchronous circuits; Automata; Circuit synthesis; Clocks; Delay; Feedback circuits; Logic circuits; Petri nets; Signal synthesis; Wire;
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location :
Chicago, IL
Print_ISBN :
0-7803-1281-3
DOI :
10.1109/ISCAS.1993.394018
