• DocumentCode
    2609906
  • Title

    SUT-RNS Residue-to-Binary Converters Design

  • Author

    Evangelos, V. ; Dimitris, B. ; Vergos, Haridimos T.

  • Author_Institution
    Dept. of Phys., Univ. of Patras, Patras, Greece
  • fYear
    2012
  • fDate
    5-8 Sept. 2012
  • Firstpage
    65
  • Lastpage
    72
  • Abstract
    The Stored Unibit Transfer (SUT) encoding has been recently proposed as a redundant high-radix encoding for each of the channels of a Residue Number System (RNS) that can improve the efficiency of Binary Signed Digit (BSD)-encoded RNS. However, a residue-to-binary (reverse) converter for it has not yet been reported in the open literature. In this paper we introduce SUT-RNS reverse converters for two different moduli sets, that is, for the 3-moduli {2n-1, 2n, 2n+1} and for the 4-moduli {2n-1, 2n, 2n+1, 22n+1} sets. The area and delay costs of the proposed converters are shown to be less than those required by the corresponding RNS converters for the BSD encoding. In the 4-moduli set case, the converters´ costs are shown to be close to those of the corresponding converters for the binary encoding.
  • Keywords
    binary codes; channel coding; data conversion; residue number systems; 3-moduli {2n-1, 2n, 2n+1} set; 4-moduli {2n-1, 2n, 2n+1, 22n+1} sets; BSD-encoded RNS converters; SUT encoding; SUT-RNS residue-to-binary converter design; SUT-RNS reverse converters; binary encoding; binary signed digit; delay costs; redundant high-radix encoding; residue number system; stored unibit transfer encoding; Adders; Computer architecture; Delay; Dynamic range; Encoding; Logic gates; Vectors; Redundant arithmetic; residue number system; reverse converter; stored unibit transfer;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Digital System Design (DSD), 2012 15th Euromicro Conference on
  • Conference_Location
    Izmir
  • Print_ISBN
    978-1-4673-2498-4
  • Type

    conf

  • DOI
    10.1109/DSD.2012.121
  • Filename
    6386871