DocumentCode :
2610142
Title :
Fully-digital testability of a high-speed conversion system
Author :
Vital, João C. ; Franca, José E. ; Silva, Nuno S.
Author_Institution :
Electr. & Comput. Eng. Dept., Inst. Superior Tecnico, Lisbon, Portugal
fYear :
1993
fDate :
3-6 May 1993
Firstpage :
1595
Abstract :
Purely-digital techniques that can be used to analyze The Performance Of A High-speed On-chip Reconfigurable Conversion System are described. The proposed techniques make use of an unconventional digital-to-analog-analog-to-digital testing loop, and therefore do not require external analog resources. This is verified by simulations performed on a dedicated test model
Keywords :
analogue-digital conversion; automatic testing; circuit analysis computing; digital simulation; digital-analogue conversion; integrated circuit testing; On-chip Reconfigurable Conversion System; dedicated test model; digital-to-analog-analog-to-digital testing loop; high-speed conversion system; purely-digital techniques; Circuit testing; Computer science; Dynamic range; Noise generators; Performance analysis; Performance evaluation; Signal resolution; Signal to noise ratio; System testing; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location :
Chicago, IL
Print_ISBN :
0-7803-1281-3
Type :
conf
DOI :
10.1109/ISCAS.1993.394043
Filename :
394043
Link To Document :
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