Title :
A Three-Dimensional Integrated Accelerator
Author :
Mehdipour, Farhad ; Nunna, Krishna C. ; Inoue, Koji ; Murakami, Kazuaki J.
Author_Institution :
E-JUST Center, Kyushu Univ., Fukuoka, Japan
Abstract :
We propose a three-dimensional (3D) reconfigurable data-path accelerator which is capable of running partitioned large data flow graphs (DFGs) on the layers of 3D stack, while inter-layer connections are implemented by means of through-silicon vias (TSVs). A tool for mapping data flow graphs has been developed, and a key 3D-specific problem namely routing nets on 3D architecture has been discussed in details as well. Conducted experiments demonstrate smaller footprint area and higher performance for the 3D accelerator comparing with 2D counterpart.
Keywords :
graph theory; network routing; three-dimensional integrated circuits; 3D reconfigurable data-path accelerator; 3D stack layers; TSV; interlayer connections; partitioned large DFG; partitioned large data flow graphs; routing nets; three-dimensional reconfigurable data-path accelerator; through-silicon vias; Arrays; Delay; Pipelines; Routing; Switches; Through-silicon vias; Data flow graph; Reconfigurable data-path accelerator; Three-dimensional integration; Through-silicon via (TSV);
Conference_Titel :
Digital System Design (DSD), 2012 15th Euromicro Conference on
Conference_Location :
Izmir
Print_ISBN :
978-1-4673-2498-4
DOI :
10.1109/DSD.2012.15
