• DocumentCode
    2610202
  • Title

    Fault detection and fault tolerance issues at CMOS level through AUED encoding

  • Author

    Bolchini, C. ; Buonanno, G. ; Sciuto, D. ; Stefanelli, R.

  • Author_Institution
    Dipt. di Elettronica e Inf., Politecnico di Milano, Italy
  • fYear
    1996
  • fDate
    6-8 Nov 1996
  • Firstpage
    258
  • Lastpage
    266
  • Abstract
    A new CMOS gate structure tolerating all single transistor stuck-on faults and a large set of multiple faults is presented. Such technique is aimed at guaranteeing fault tolerance for a multiple output gate and the fault tolerance property is achieved through an AUED separated encoding of the output functions and the introduction of additional transistors which avoid fault propagation. As an example, Berger code will be discussed
  • Keywords
    CMOS logic circuits; encoding; fault diagnosis; logic testing; AUED encoding; Berger code; CMOS gate; fault detection; fault tolerance; multiple fault; multiple output gate; single transistor stuck-on fault; Circuit faults; Costs; Encoding; Fault detection; Fault diagnosis; Fault tolerance; Joining processes; Switches; Switching circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance in VLSI Systems, 1996. Proceedings., 1996 IEEE International Symposium on
  • Conference_Location
    Boston, MA
  • ISSN
    1550-5774
  • Print_ISBN
    0-8186-7545-4
  • Type

    conf

  • DOI
    10.1109/DFTVS.1996.572032
  • Filename
    572032