DocumentCode
2610287
Title
A method for improving the efficiency of simulating large electronic circuits
Author
Song, H. ; Divekar, D. ; Mills, L. ; Wang, P.
Author_Institution
CONTEC Microelectronics, USA Inc., San Jose, CA, USA
fYear
1993
fDate
3-6 May 1993
Firstpage
1631
Abstract
The efficiency of a circuit simulator can be measured in terms of its simulation speed and memory usage requirements. Rather than working with numerical integration, sparse matrix, and network equation formulation techniques to improve simulation efficiency, the effects of circuit topology of the built-in models on the simulation efficiency are investigated. A new model transformation technique is developed and implemented in a simulation program with IC emphasis (SPICE)-like program. Experimental results are presented
Keywords
SPICE; circuit analysis computing; digital simulation; integrated circuit design; integrated circuit modelling; network topology; SPICE; built-in models; circuit simulator; circuit topology; memory usage; model transformation technique; simulation efficiency; simulation speed; Circuit simulation; Circuit topology; Electronic circuits; Equations; Equivalent circuits; MOSFETs; Matrix decomposition; Milling machines; Semiconductor diodes; Sparse matrices;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location
Chicago, IL
Print_ISBN
0-7803-1281-3
Type
conf
DOI
10.1109/ISCAS.1993.394052
Filename
394052
Link To Document