DocumentCode
2610541
Title
Algorithm-Architecture Co-Optimization of Area-Efficient SDR Baseband for Highly Diversified Digital TV Standards
Author
Kobayashi, Kiyotaka ; Yomo, Hidekuni ; Li, Min ; Appeltans, Raf ; Cappelle, Hans ; Amin, Amir ; Couvreur, Aissa ; Hartmann, Matthias ; Bourdoux, André ; Raghavan, Praveen ; Dejonghe, Antoine ; Van der Perre, Liesbet
Author_Institution
Commun. Core Devices Dev. Center, Panasonic Corp., Tokyo, Japan
fYear
2012
fDate
6-9 May 2012
Firstpage
1
Lastpage
5
Abstract
The rapidly evolving and diversifying wireless landscape demands highly flexible wireless chipsets. Due to the ultimate programmability, SDR solutions are becoming more and more attractive. However, the programmability overhead is still a concern for the silicon area cost of SDR solutions. In this work, we prove that, with algorithm and architecture co- design, SDR solutions can be very competitive even when compared to highly optimized ASICs. Specifically, we show a baseband processor design that can support ISDB-T, DVB-T and ATSC, but the area cost is still comparable to the combination of ASICs which handle the three terrestrial digital TV standards respectively.
Keywords
application specific integrated circuits; digital video broadcasting; television receivers; ASIC; ATSC; DVB-T; ISDB-T; algorithm architecture cooptimization; application specific integrated circuits; area efficient SDR baseband; baseband processor; highly diversified digital TV standards; programmability overhead; terrestrial digital TV standards; wireless chipsets; Application specific integrated circuits; Baseband; Multiplexing; Program processors; Receivers; Signal processing algorithms; Standards;
fLanguage
English
Publisher
ieee
Conference_Titel
Vehicular Technology Conference (VTC Spring), 2012 IEEE 75th
Conference_Location
Yokohama
ISSN
1550-2252
Print_ISBN
978-1-4673-0989-9
Electronic_ISBN
1550-2252
Type
conf
DOI
10.1109/VETECS.2012.6240020
Filename
6240020
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