Title :
Procedure for Testing Electrostatic Discharge Susceptibility of MOS Devices
Author_Institution :
American Microsystems Inc., 3800 Homestead Road, Santa Clara, California 95051. (408) 246-0330
Abstract :
This paper describes a simple method for determining the susceptibility levels of packaged devices to electrostatic discharge (ESD) potential. Examples of protection network configurations are presented, along with failure threshold levels and the damage mechanisms.
Keywords :
Circuit testing; Condition monitoring; Electrostatic discharge; Failure analysis; MOS devices; Pins; Protection; Stress; Switches; Threshold voltage;
Conference_Titel :
Reliability Physics Symposium, 1981. 19th Annual
Conference_Location :
Las Vegas, NV, USA
DOI :
10.1109/IRPS.1981.362996