DocumentCode
2610781
Title
A high throughput systolic design for QR algorithm
Author
Wang, Jiann-Jenn ; Jen, Chein-Wei
Author_Institution
Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear
1993
fDate
3-6 May 1993
Firstpage
1742
Abstract
Based on the Givens rotation, a high throughput systolic array for the QR algorithm is proposed. Two techniques are adopted to increase the throughput rate in this design. First, the reformulation of the Givens rotation is presented to release the recursive relation and so increase the parallelism and reduce the computational complexity. Second, parallel processing and two-level pipelined techniques can be used to increase the throughput rate and reduce the latency. In the new design, the throughput rate is increased to 1/TMA, where TMA is the computation time of multiplication-addition. This throughput rate is faster than that in all previous designs. The latency is also superior to the previous designs
Keywords
computational complexity; pipeline processing; recursive functions; systolic arrays; Givens rotation; QR algorithm; computation time; computational complexity; high throughput systolic design; latency; parallel processing; recursive relation; throughput rate; two-level pipelined techniques; Adaptive signal processing; Algorithm design and analysis; Computational complexity; Computer architecture; Delay; Parallel processing; Pipeline processing; Signal processing algorithms; Systolic arrays; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location
Chicago, IL
Print_ISBN
0-7803-1281-3
Type
conf
DOI
10.1109/ISCAS.1993.394080
Filename
394080
Link To Document