DocumentCode :
2610816
Title :
On Modeling and Evaluation of Logic Circuits under Timing Variations
Author :
Dehbashi, Mehdi ; Fey, Görschwin ; Roy, Kaushik ; Raghunathan, Anand
Author_Institution :
Inst. of Comput. Sci., Univ. of Bremen, Bremen, Germany
fYear :
2012
fDate :
5-8 Sept. 2012
Firstpage :
431
Lastpage :
436
Abstract :
This paper presents a methodology to model and analyze the functional behavior of logic circuits under timing variations. In the framework, first a Time Accurate Model (TAM) of the circuit is constructed. The TAM represents the behavior of the circuit in the functional domain under a discrete time model. Afterwards, Variation Logic is inserted to apply the timing variations. Moreover, the circuit TAM is enhanced by Time Control (TC) logic to model the circuit frequency. We apply the proposed methodology to analyze a circuit or an approximate circuit under timing variations as well as to analyze a circuit under timing-induced errors for approximate computing.
Keywords :
integrated circuit modelling; logic circuits; TC logic; circuit TAM; circuit frequency model; discrete time model; functional domain; logic circuit evaluation; logic circuit functional behavior; logic circuit modeling; time accurate model; time control logic; timing variations; timing-induced errors; variation logic; Approximation methods; Clocks; Delay; Integrated circuit modeling; Logic gates; Multiplexing; formal verification; logic circuits; timing variations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital System Design (DSD), 2012 15th Euromicro Conference on
Conference_Location :
Izmir
Print_ISBN :
978-1-4673-2498-4
Type :
conf
DOI :
10.1109/DSD.2012.91
Filename :
6386923
Link To Document :
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