Title :
Speeding design centering by reusing simulated data
Author :
Ming, X.X. ; Spence, Robert
Author_Institution :
Dept. of Electr. & Electron. Eng., Imperial Coll. of Sci., Technol., & Med., London, UK
Abstract :
A new approach to tolerance design is described. It first uses a very efficient optimization algorithm (MACH) to bring the nominal circuit design within the region of accountability. The second-order performance constraint models generated and continuously updated by MACH then allow the inexpensive application of a proven design centering algorithm. Tests show that the use of optimization and second-order models can lead to the enhancement and estimation of yield at low computational cost
Keywords :
circuit optimisation; integrated circuit yield; iterative methods; tolerance analysis; MACH; computational cost; design centering; nominal circuit design; optimization algorithm; region of accountability; second-order models; second-order performance constraint models; tolerance design; yield; Algorithm design and analysis; Circuit simulation; Computational efficiency; Constraint optimization; Design methodology; Design optimization; Iterative algorithms; Manufacturing; Medical simulation; Quadratic programming;
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location :
Chicago, IL
Print_ISBN :
0-7803-1281-3
DOI :
10.1109/ISCAS.1993.394092
