A heuristic global optimization algorithm and its application to CMOS circuit variability minimization

Author

Qu, Ming ; Styblinski, M.A.

Author_Institution

Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA

fYear

1993

fDate

3-6 May 1993

Firstpage

1809

Abstract

A global optimization method with heuristic searching methodology is presented. By introducing the strategy of cluster analysis and random reflection adjustment, the optimum searching procedure is put in an adaptive mode. Numerical testing and design practice of IC variability minimization show that the algorithm is moderately robust and efficient. Since no strict assumptions about the objective function are made, it is suitable for different formulations of various design optimization problems, such as l₁ norm and minimax designs

Keywords

CMOS integrated circuits; circuit optimisation; integrated circuit design; minimax techniques; pattern recognition; CMOS circuit; cluster analysis; design optimization problems; heuristic global optimization algorithm; heuristic searching methodology; minimax designs; optimum searching procedure; random reflection adjustment; variability minimization; Algorithm design and analysis; Clustering algorithms; Design optimization; Heuristic algorithms; Integrated circuit testing; Minimax techniques; Minimization methods; Optimization methods; Reflection; Robustness;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on

Conference_Location

Chicago, IL

Print_ISBN

0-7803-1281-3

Type

conf

DOI

10.1109/ISCAS.1993.394097

Filename

394097