• DocumentCode
    2611130
  • Title

    A Parallel Architecture for Koblitz Curve Scalar Multiplications on FPGA Platforms

  • Author

    Roy, Sujoy Sinha ; Rebeiro, Chester ; Mukhopadhyay, Debdeep

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, Kharagpur, India
  • fYear
    2012
  • fDate
    5-8 Sept. 2012
  • Firstpage
    553
  • Lastpage
    559
  • Abstract
    Elliptic curve scalar multiplication is the central operation in elliptic curve cryptography. The paper presents a parallel architecture to accelerate scalar multiplications on Koblitz curves. The scalar multiplier architecture converts the scalar into τ-NAF representation and processes the zero digits of the scalar in parallel to point additions. Since the conversion from integer to τ-NAF is a time consuming operation, the proposed architecture uses recently developed double lazy reduction algorithm for conversion of scalar. The scalar multiplier processes two consecutive τ-NAF digits in every iteration. This facilitates parallel processing of large number of consecutive zero digits during a single point addition and practically no time is spent for processing the zero digits of the scalar. The proposed techniques are incorporated in a scalar multiplier and validated on Xilinx Virtex IV FPGA. Experimental results show that our architecture in F2163 has the best performance and has the computation time comparable with the fastest known implementation, which uses window based scalar multiplication algorithm.
  • Keywords
    field programmable gate arrays; parallel architectures; public key cryptography; τ-NAF representation; F2163 architecture; FPGA platforms; Koblitz curve scalar multiplication algorithm; Xilinx Virtex IV FPGA; double lazy reduction algorithm; elliptic curve cryptography; parallel architecture; parallel processing; scalar multiplier architecture; Acceleration; Clocks; Computer architecture; Field programmable gate arrays; Hardware; Parallel processing; Registers; Elliptic Curve; FPGAs; High-speed Design; Koblitz Curve; Scalar Multiplication;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Digital System Design (DSD), 2012 15th Euromicro Conference on
  • Conference_Location
    Izmir
  • Print_ISBN
    978-1-4673-2498-4
  • Type

    conf

  • DOI
    10.1109/DSD.2012.10
  • Filename
    6386941