Title :
Secured elliptic curve cryptosystems for scan based VLSI architecture
Author :
Sridhar, K.P. ; Raguram, M. ; Prakash, B. ; Koushighan, S. ; Saravanan, S.
Author_Institution :
Sch. of Comput., SASTRA Univ., Thanjavur, India
Abstract :
Ellipti curve Cryptosystem used in cryptograhy chips undergoes side channel threats, where the attackers deciphered the secret key from the scan path through finding the memory element position by applying reverse enginering process in montgomery algorithm used in Elliptic device. Hence we propose the modified scan path architecture through the addition of extra electronic componet inorder to protect the secret key against the threats. The modified elliptic curve crypro scan architecture written in verilog code and simulated using model Sim Tool. The hardware module core is synthesised using Xillinx Spartan III Field Programable Gatted Array (FPGA) kit. The perfomance utilization is reported with the help of generated synsthesis result.
Keywords :
VLSI; cryptography; field programmable gate arrays; hardware description languages; FPGA kit; Xillinx Spartan III field programable gatted array; cryptograhy chips; elliptic device; hardware module core; memory element position; model Sim Tool; modified elliptic curve crypro scan architecture; modified scan path architecture; montgomery algorithm; perfomance utilization; reverse enginering process; scan based VLSI architecture; secret key; secured elliptic curve cryptosystems; side channel threats; verilog code; Computer architecture; Educational institutions; Elliptic curve cryptography; Elliptic curves; Logic gates; Very large scale integration; Elliptic Curve Cryptosystem; Scan Based Side challel attack; Security Issuses; VLSI; Verilog;
Conference_Titel :
Information Communication and Embedded Systems (ICICES), 2014 International Conference on
Conference_Location :
Chennai
Print_ISBN :
978-1-4799-3835-3
DOI :
10.1109/ICICES.2014.7034009