Title :
JAAVR: Introducing the Next Generation of Security-Enabled RFID Tags
Author :
Wenger, Erich ; Baier, Thomas ; Feichtner, Johannes
Author_Institution :
Inst. for Appl. Inf. Process. & Commun., Graz Univ. of Technol., Graz, Austria
Abstract :
JAAVR stands for Just Another AVR, is a clone of the popular ATmega128 microprocessor, and is used as the core component of a security-enabled RFID tag. First, we evaluate different hardware designs using JAAVR to communicate via ISO 14443A. Second, we implement AES, Gr{o}stl and Elliptic Curve Cryptography (ECC) and present several new runtime and low-memory records. Third, we add those assembly-optimized implementations to our RFID platform and investigate their impact in chip area and power consumption. Our designs are fully synthesizable as ASIC and FPGA and were tested using a discrete analog front-end and a standard RFID reader.
Keywords :
ISO standards; application specific integrated circuits; field programmable gate arrays; microprocessor chips; power consumption; public key cryptography; radiofrequency identification; AES; ASIC; ATmega128 microprocessor; ECC; FPGA; Grøstl; ISO 14443A; JAAVR; advanced encryption standard; assembly optimized implementation; core component; discrete analog front-end; elliptic curve cryptography; hardware design; just another AVR; memory record; power consumption; radio frequency identification; runtime memory; security enabled RFID tags; Elliptic curve cryptography; Elliptic curves; Field programmable gate arrays; Radiofrequency identification; Random access memory; Runtime; AES; ASIC; ATmega; AVR; ECC; FPGA; Groestl; RFID; low-area design;
Conference_Titel :
Digital System Design (DSD), 2012 15th Euromicro Conference on
Conference_Location :
Izmir
Print_ISBN :
978-1-4673-2498-4
DOI :
10.1109/DSD.2012.81
