A Model for Low-Voltage Instability in Ceramic Capacitors

Problems of low-voltage instability in ceramic capacitors have recently aroused much interest. Holladay, et al., have measured the time course of DC leakage current of multilayer hermetically sealed ceramic capacitors (K=5500) at room temperature with constant low-voltage bias v, e.g., 1.5V and 3.2V or an average applied field Ea ¿ 0.45 to 1 KV/cm. Their data will be described by a straight line in each of two semilogarithmic graphs, one "In tp versus v¿" and the other "ln ip versus v¿". Here tp, is the time, whence the current reaches a peak ip. From these graphs, a Poole-Frenkel field EPF ¿ 300 Ea, Schottky-like field Es ¿ 7800 Ea, shelf life = 2.7 year and zero bias ip ¿ 15 pA will be deduced. Based on the above parameters, the low-voltage behavior of ceramic capacitors may be interpreted as domain switching in the ferroelectric grain initiated by a Poole-Frankel process in the grain adjacent to the grain boundary. The process is then followed by a Schottky-like emission from the grain surface in order to release screening electrons from pre-switched domain. The conducting path of the DC leakage current from a domain-switching grain is likely along a multitude of intergranular boundaries, instead of passing through the ceramic grains. This concept of grain-boundary conduction is consistent with the general behavior of low-voltage instability of ceramic capacitors. e.g., occasional occurrence and recoverability at high voltages. Low-voltage instabilities may be classified into two types: "intrinsic" type due to manufactur, ed ceramic structure, e.g.