Automated Contactless SEM Testing for VLSI Development and Failure Analysis

A computer controlled test system has been developed for VLSI/LSI circuit failure analysis and design verification using the electron beam of the SEM (Scanning Electron Microscope) as a non-contacting probe. This system inputs truth tables to device under test, determines, stores, and verifies the logic state of internal nodes under computer controL Practical applications of the system to design verification are described. The system concept has been demonstrated using the standard equipment with minor additions.