A Simple Technique for Analysis of ESD Failures of Dynamic RAMS using Liquid Crystals

As integrated circuit geometries decrease in size and spacing, the effects of electrostatic discharge (ESD) on small geometry devices such as 16K Dynamic Random Access Memories become of increasing concern. To improve susceptibility of these devices, ESD failures must be induced and isolated and the mechanisms studied. This paper describes a simple, efficient method of isolating a specific ESD related failure mechanism, that is, polysilicon gate to diffusion shorting. The paper also describes results obtained when using this technique. Other fault site isolation methods using liquid crystals have been described. The temperature dependent change of optical properties of cholesteric liquid crystal materials has been used to detect "hot spots" on integrated circuits. Some cholisterics may not be sensitive enough to detect the low power dissipating shunts characteristic of ESD failures. Liquid crystal cells using optical birefringence properties of nematic liquid crystals have also been employed in fault site identification. This technique requires the treatment of the integrated circuit surface, the preparation of a cover glass cut to the size of the chip, and the observation of the circuit through a cross polarizing optical system. The sample preparation for the technique described here consists of simply applying nematic liquid crystal material to the untreated surface of a failing integrated circuit. By pulsing the failing buffer with a low frequency square wave (5 - 20 Hz), a flash may be observed near the short with a standard bench microscope. This method offers quick fail site isolation with one or two micron resolution.