Run time reconfiguration of FPGA for scanning genomic databases

This paper evaluates the feasibility of reconfiguring an FPGA at run time, and tests its performance using a “Grand Challenge Problem”, the high speed scanning of genomic sequence databases. Algorithm implementation into a XC3090 FPGA is described, and methods proposed for generating a placed Xilinx Netlist File that can be efficiently routed at run time by the Automated Placing and Routing Xilinx tools, in order to increase the speed and the density of the design. The same algorithm carefully optimised on a RISC processor has been compared with the run time reconfigurated FPGA, and shows the latter to have an improvement in speed of two to three orders of magnitude