• DocumentCode
    2611797
  • Title

    A pipelined adaptive differential vector quantizer for low-power speech coding applications

  • Author

    Shanbhag, Naresh R. ; Parhi, Keshab K.

  • Author_Institution
    Dept. of Electr. Eng., Minnesota, Univ., Minneapolis, MN, USA
  • fYear
    1993
  • fDate
    3-6 May 1993
  • Firstpage
    1956
  • Abstract
    A fine-grain pipelined adaptive differential vector quantizer architecture is proposed for low-power speech coding applications. The pipelined architecture is developed by employing the relaxed look-ahead torque. The hardware overhead due to pipelining is only the pipelining latches. Simulations with speech sampled at 8 KHz show that, for a vector dimension of 8, the degradation in the signal-to-noise ratio (SNR) due to pipelining is negligible. This degradation is independent of the level of pipelining. The proposed architecture is attractive from an integrated circuit implementation point of view
  • Keywords
    adaptive signal processing; parallel architectures; pipeline processing; speech coding; vector quantisation; fine-grain architecture; hardware overhead; low-power speech coding; pipelined adaptive differential vector quantizer; pipelining latches; relaxed look-ahead torque; signal-to-noise ratio; speech; vector dimension; Decoding; Degradation; Digital signal processing chips; Hardware; Latches; Pipeline processing; Signal processing algorithms; Speech coding; Vectors; Video compression;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
  • Conference_Location
    Chicago, IL
  • Print_ISBN
    0-7803-1281-3
  • Type

    conf

  • DOI
    10.1109/ISCAS.1993.394134
  • Filename
    394134