Energy-Aware FPGA-based Architecture for Wireless Sensor Networks

Wireless sensor networks (WSNs) are networks of battery-powered sensing devices connected with wireless interfaces. Energy consumption and processing efficiency are relevant characteristics for these systems, thus energy-efficient architectures are required. Recent works show that FPGAs are suitable candidates for efficient data signal processing in WSNs. In this work, we evaluate Flash-based FPGA technology for WSNs´ applications, and we present FPGA-based architecture for data signal processing in WSN´s nodes. Low static power consumption of Flash-FPGAs is a fundamental characteristic in WSNs systems, which are characterized by long idle periods. SRAM-based and Flash-based FPGAs were compared, and an architecture to manage dynamic energy consumption in Flash-based FPGAs is presented. The architecture has been validated and evaluated on a real testbed, and power consumption results are presented. In our experiments, the overall power consumption of the FPGA is kept below 4mW.