Numerical investigation of the total SOA of trench field-plate LDMOS devices

Author

Poli, S. ; Reggiani, S. ; Baccarani, G. ; Gnani, E. ; Gnudi, A. ; Denison, M. ; Pendharkar, S. ; Wise, R.

Author_Institution

DEIS, Univ. of Bologna, Bologna, Italy

fYear

2010

fDate

6-8 Sept. 2010

Firstpage

111

Lastpage

114

Abstract

A numerical investigation of electrical and thermal properties of a lateral trench field-plate (TFP) LDMOS is proposed. Beside the advantage in terms of specific on-resistance (R_SP) vs. breakdown voltage (V_BD) trade-off, achieved with a proper optimization of the geometrical and doping parameters, the use of deep trenches is discussed here with particular attention to their impact on the electrical safe-operating area (SOA), hot-carrier stress (HCS) reliability, self-heating effects (SHE) and thermal SOA.

Keywords

MIS devices; hot carriers; semiconductor device breakdown; semiconductor device models; semiconductor device reliability; technology CAD (electronics); thermal properties; SOA; electrical properties; electrical safe-operating area; hot-carrier stress reliability; numerical investigation; self-heating effects; thermal properties; trench field-plate LDMOS devices; Fingers; Logic gates; Performance evaluation; Semiconductor optical amplifiers; Silicon; Stress; Three dimensional displays;

fLanguage

English

Publisher

ieee

Conference_Titel

Simulation of Semiconductor Processes and Devices (SISPAD), 2010 International Conference on

Conference_Location

Bologna

ISSN

1946-1569

Print_ISBN

978-1-4244-7701-2

Electronic_ISBN

1946-1569

Type

conf

DOI

10.1109/SISPAD.2010.5604555

Filename

5604555