DocumentCode
2611933
Title
Design and Implementation of a Circuit for Mesh Networks with Application in Body Area Networks
Author
Derogarian, Fardin ; Ferreira, João Canas ; Tavares, Vítor M Grade
Author_Institution
Fac. de Eng., Univ. do Porto Porto, Porto, Portugal
fYear
2012
fDate
5-8 Sept. 2012
Firstpage
896
Lastpage
901
Abstract
This paper presents a network circuit for wearable low-power BAN (Body Area Networks) applications, geared towards mesh network topologies with conductive yarns as transmission channels. The design and implementation of the physical and MAC layers is described. The resulting circuit sends and receives data simultaneously, and experimental results indicate that the proposed system works with variable data rates, up to a maximum of 9+9 Mbps. All reported measurements were collected from working FPGA-based prototypes, and the performance achieved shows that the circuit is suitable for use in reliable high-speed low-power BAN applications.
Keywords
body area networks; field programmable gate arrays; telecommunication network topology; wireless mesh networks; FPGA; MAC layers; body area networks; conductive yarns; high-speed low-power BAN; network circuit design; physical layers; transmission channels; wearable low-power BAN; wireless mesh network topology; Field programmable gate arrays; Peer to peer computing; Prototypes; Receivers; Sensors; Wires; Yarn;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design (DSD), 2012 15th Euromicro Conference on
Conference_Location
Izmir
Print_ISBN
978-1-4673-2498-4
Type
conf
DOI
10.1109/DSD.2012.41
Filename
6386988
Link To Document