Title :
MISR architectures to remove unknown values in output response compaction
Author :
Aruna, S.R. ; Neelukumari, K.S.
Author_Institution :
Dept. of ECE, K.S. Rangasamy Coll. of Technol., Tiruchengode, India
Abstract :
MISR architectures are proposed to remove the unknown (X) values in the output sequences. The MISR signature is represented as a system of linear equations in terms of unknown´s (X). The method of symbolic simulation is used to represent each bit of the MISR signature. The combination of linear equations of the MISR signature bits is determined with Gauss-Jordan Elimination algorithm to remove unknown values in the output responses. These X-cancelled combinations are then computed in a separate storage register to provide X-free combinations values. Experimental result describes that maximum error coverage and test time can be obtained with the help of theses MISR architectures.
Keywords :
compaction; digital signatures; flip-flops; shift registers; Gauss-Jordan elimination; MISR architectures; MISR signature; X-cancelled combinations; X-free combinations values; linear equations; multiple input signature register; output response compaction; output sequences; separate storage register; symbolic simulation; unknown value removal; Built-in self-test; Compaction; Computer architecture; Educational institutions; Equations; Mathematical model; Registers; Gauss-Jordan Elimination; Linear Feedback Shift Register (LFSR); Multiple Input Signature Register (MISR); Output response compaction; Symbolic simulation;
Conference_Titel :
Information Communication and Embedded Systems (ICICES), 2014 International Conference on
Conference_Location :
Chennai
Print_ISBN :
978-1-4799-3835-3
DOI :
10.1109/ICICES.2014.7034081