Title :
Power-efficient high throughput turbo decoder architecture for WSN
Author :
Nanthini, N. ; Kumar, P. Saravana
Abstract :
Turbo codes have been measured for power-constrained wireless communication applications, since they assist a low power consumption. In our paper, we implement the turbo decoder in wireless networks by using basic architecture of Add Compare Select Unit (ACS) which is derived from the LUT-Log-BCJR (Bahl-Cocke-Jelinek-Raviv) architecture. Further our paper facilitating power consumption reduction and throughput improvement. Our Paper is to redesign the timing of the conventional architecture in a manner that allows its components to be effectively merged. This produces an architecture comprising low complexity functional units, which are capable of performing the entire LUT-Log BCJR algorithm.
Keywords :
computational complexity; decoding; turbo codes; wireless sensor networks; ACS unit; Bahl-Cocke-Jelinek-Raviv architecture; LUT-log-BCJR architecture; WSN; add compare select unit; low-complexity functional units; low-power consumption; power consumption reduction; power-constrained wireless communication application; power-efficient high-throughput turbo decoder architecture; throughput improvement; turbo codes; wireless networks; Clocks; Decoding; Registers; Throughput; Wireless communication; Wireless sensor networks; Error Correcting Code; LUT-Log BCJR Algorithm; PowerEfficient; Turbo Codes;
Conference_Titel :
Information Communication and Embedded Systems (ICICES), 2014 International Conference on
Conference_Location :
Chennai
Print_ISBN :
978-1-4799-3835-3
DOI :
10.1109/ICICES.2014.7034094