DocumentCode
2612278
Title
Analog design optimization: A case study
Author
Chávez, J. ; Aguirre, M.A. ; Torralba, A.
Author_Institution
Dpto. de Ingenieria Electronica, de Sistemas & Autom., Univ. de Sevilla, Spain
fYear
1993
fDate
3-6 May 1993
Firstpage
2083
Abstract
An analog design optimization procedure is based on simulated annealing is proposed. The new method takes into account the cost function gradient, performing like simulated annealing at high temperatures and like a steepest descendent method near the frozen condition. The proposed method avoids the excessively time-consuming final iterations characteristic of the conventional simulated annealing algorithm
Keywords
CMOS analogue integrated circuits; SPICE; circuit CAD; circuit analysis computing; circuit optimisation; network topology; simulated annealing; analog design optimization procedure; cost function gradient; frozen condition; high temperatures; simulated annealing; steepest descendent method; Circuit simulation; Circuit topology; Computational modeling; Computer aided software engineering; Cost function; Design optimization; Operational amplifiers; Optimization methods; Simulated annealing; Temperature;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location
Chicago, IL
Print_ISBN
0-7803-1281-3
Type
conf
DOI
10.1109/ISCAS.1993.394166
Filename
394166
Link To Document