Title :
Block-diagram-level design capture, functional simulation, and layout assembly of analog CMOS ICs
Author :
Current, K. Wayne ; Parker, Jim ; Hardaker, Wes
Author_Institution :
Electr. & Comput. Eng. Dept., California Univ., Davis, CA, USA
Abstract :
A new computer aided design tool to assist in the fast prototyping of analog CMOS ICs is presented. This CAD system uses a library of precharacterized functional cells. It allows creation of a design by selecting analog function blocks from a library and by interconnecting them in a block-diagram-level design capture and simulation page. The new analog circuit is then simulated at a behavorial level to evaluate circuit performance. The IC layout is assembled by a cell placement and routing program, using cell layouts from the cell library. Examples illustrate features of this CAD system
Keywords :
CMOS analogue integrated circuits; circuit analysis computing; circuit layout CAD; digital simulation; integrated circuit layout; network routing; analog CMOS ICs; behavorial level; block-diagram-level design capture; cell library; cell placement; circuit performance; computer aided design tool; fast prototyping; function blocks; layout assembly; precharacterized functional cells; routing program; Analog circuits; Analog computers; Circuit optimization; Circuit simulation; Computational modeling; Design automation; Integrated circuit interconnections; Integrated circuit layout; Libraries; Prototypes;
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location :
Chicago, IL
Print_ISBN :
0-7803-1281-3
DOI :
10.1109/ISCAS.1993.394168
