• DocumentCode
    2613521
  • Title

    A C++ compiler for FPGA custom execution units synthesis

  • Author

    Iseli, Christian ; Sanchez, Eduardo

  • Author_Institution
    Lab. de Syst. Logiques, Ecole Polytech. Federale de Lausanne, Switzerland
  • fYear
    1995
  • fDate
    19-21 Apr 1995
  • Firstpage
    173
  • Lastpage
    179
  • Abstract
    If reconfigurable processors are to become widely used, we will need tools to help conventional programmer use them. In particular, a single high-level language should be used to program the whole application; both the part which will become the hardware configuration and the part which remains software. Spyder is a reconfigurable processor with configurable execution units. The C++ language has been chosen as the source language to program this processor. In this paper we present a compiler capable of synthesizing the hardware configuration of FPGA execution units from C++ source code. The same source code can be compiled by a standard C++ compiler for simulation purposes. First estimates show that this approach leads to very short synthesize time as compared to VHDL synthesizer for a similar quality of the generated hardware
  • Keywords
    C language; circuit layout CAD; field programmable gate arrays; logic CAD; program compilers; programmable logic arrays; reconfigurable architectures; C++ compiler; FPGA custom execution units synthesis; Spyder; configurable execution units; hardware configuration; reconfigurable processors; Arithmetic; Clocks; Computerized monitoring; Design automation; Field programmable gate arrays; Hardware design languages; High level languages; Logic; Programming profession; Routing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    FPGAs for Custom Computing Machines, 1995. Proceedings. IEEE Symposium on
  • Conference_Location
    Napa Valley, CA
  • Print_ISBN
    0-8186-7548-9
  • Type

    conf

  • DOI
    10.1109/FPGA.1995.477423
  • Filename
    477423