An emulation tool for verification of complex algorithms implemented on a multiple processor

Author

Martin, Harold L., Sr. ; Kim, Jung ; Kim, Young ; Hughes, Esther ; Jones, Edward

Author_Institution

North Carolina A&T State Univ., Greensboro, NC, USA

fYear

1988

fDate

0-0 1988

Firstpage

61

Lastpage

68

Abstract

Algorithms have been developed for the efficient partitioning of matrix operations such as addition, subtraction, multiplication, matrix inversion, etc., and the allocation of parallel computational tasks in a multiprocessing environment. A single instruction-multiple data stream (SIMD) machine has been developed to implement the suggested scheduling algorithms for matrix computations. To verify the partitioning algorithms and the suggested performance enhancements, an emulation tool has been developed. The attributes of the emulator are presented.<>

Keywords

matrix algebra; parallel processing; program verification; scheduling; virtual machines; SIMD machine; addition; algorithm verification; complex algorithms; emulation tool; matrix algebra; matrix inversion; multiplication; multiprocessing environment; parallel computational tasks; parallel processing; partitioning; scheduling; single instruction-multiple data stream machine; subtraction; Arithmetic; Communication system control; Concurrent computing; Emulation; Parallel processing; Partitioning algorithms; Scheduling algorithm; Signal processing algorithms; Streaming media; Strontium;

fLanguage

English

Publisher

ieee

Conference_Titel

System Theory, 1988., Proceedings of the Twentieth Southeastern Symposium on

Conference_Location

Charlotte, NC, USA

ISSN

0094-2898

Print_ISBN

0-8186-0847-1

Type

conf

DOI

10.1109/SSST.1988.17016

Filename

17016