Title :
Rapid prototyping of a RISC architecture for implementation in FPGAs
Author :
Meier, Russell D.
Author_Institution :
Dept. of Electr. Eng. & Comput. Eng., Iowa State Univ., Ames, IA, USA
Abstract :
This paper focuses on the use of a rapid prototyping system to develop a simple RISC microprocessor architecture for implementation in field programmable gate arrays. The rapid prototyping system enables engineers and academic professionals to quickly place new concepts into circuitry, thus bypassing the traditional lengthy design time. The system consists of object-based component libraries, created using a standard hardware-description language, along with simulation tools for visual performance verification. Microprocessors based on this architecture have been implemented in various forms of programmable logic to demonstrate the validity of using the rapid prototyping system to create custom computing machines
Keywords :
field programmable gate arrays; hardware description languages; logic CAD; microprocessor chips; performance evaluation; reduced instruction set computing; virtual machines; FPGA; RISC architecture; RISC microprocessor architecture; circuit design; custom computing machines; field programmable gate arrays; hardware-description language; microprocessors; object-based component libraries; programmable logic; rapid prototyping; simulation tools; visual performance verification; Circuit simulation; Computational modeling; Computer architecture; Design engineering; Field programmable gate arrays; Libraries; Microprocessors; Prototypes; Reduced instruction set computing; Systems engineering and theory;
Conference_Titel :
FPGAs for Custom Computing Machines, 1995. Proceedings. IEEE Symposium on
Conference_Location :
Napa Valley, CA
Print_ISBN :
0-8186-7548-9
DOI :
10.1109/FPGA.1995.477425