• DocumentCode
    2614132
  • Title

    FPGA-based transformable computers for fast digital signal processing

  • Author

    Chow, H.A. ; Alnuweiri, H. ; Casselman, S.

  • Author_Institution
    Dept. of Electr. Eng., British Columbia Univ., Vancouver, BC, Canada
  • fYear
    1995
  • fDate
    19-21 Apr 1995
  • Firstpage
    197
  • Lastpage
    203
  • Abstract
    FPGA-based computing systems provide a feasible and cost-effective platform for implementing fast parallel arithmetic circuits for digital signal and image processing. This paper reports the results obtained from embedding a highly parallel convolution algorithm on an FPGA-based “transformable” computer. Such a computer is intended to serve as a transformable co-processor for a standard microprocessor system. However, the transformable co-processor is reconfigurable and is capable of exploiting the concurrency of computations more than the “sequential” microprocessor. Our experiments show that a significant gain in speed can be achieved by using the transformable coprocessor. We present an example of performing a sequence of (independent) 16-point convolutions on 8-bit data, and show that the speed factor improves significantly as the number of convolutions to be performed increases
  • Keywords
    coprocessors; field programmable gate arrays; image processing; matrix algebra; parallel algorithms; parallel architectures; reconfigurable architectures; signal processing; 8 bit; FPGA; convolutions; cost-effective; fast digital signal processing; fast parallel arithmetic circuits; image processing; microprocessor system; parallel convolution algorithm; reconfigurable architecture; transformable computers; transformable coprocessor; Circuits; Computer architecture; Concurrent computing; Convolution; Digital signal processing; Field programmable gate arrays; Microprocessors; Parallel architectures; Signal processing algorithms; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    FPGAs for Custom Computing Machines, 1995. Proceedings. IEEE Symposium on
  • Conference_Location
    Napa Valley, CA
  • Print_ISBN
    0-8186-7548-9
  • Type

    conf

  • DOI
    10.1109/FPGA.1995.477426
  • Filename
    477426