DocumentCode
2614158
Title
Optimal single hop multiple bus networks
Author
Dai, Wayne Wei-Ming ; Kajitani, Yoji ; Hirata, Yorihiko
Author_Institution
Dept. of Comput. Eng., California Univ., Santa Cruz, CA, USA
fYear
1993
fDate
3-6 May 1993
Firstpage
2541
Abstract
The authors propose a class of single hop multiple bus networks based on balanced incomplete block design (BIBD). After introducing the basic concepts of multiple bus networks, a theorem is presented, which justifies the restriction of critically single hop bus (CSHB) networks. A model for performance analysis of CSHB networks is introduced, and it is proved that a CSHB network is optimal if both bus load and processor fanout are constant. Since topologies of such a balanced CSHB based on BIBD do not exist for all n , the number of processors, two theorems are included for the construction of CSHB networks for all n , with bounded skew in the bus loading and processor fanout
Keywords
computer network reliability; multiprocessor interconnection networks; performance evaluation; CSHB networks; balanced incomplete block design; bounded skew; bus load; critically single hop bus; performance analysis; processor fanout; single hop multiple bus networks; Bandwidth; Birds; Design engineering; Fans; Hypercubes; Network topology; Performance analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location
Chicago, IL
Print_ISBN
0-7803-1281-3
Type
conf
DOI
10.1109/ISCAS.1993.394283
Filename
394283
Link To Document