• DocumentCode
    2614204
  • Title

    Design and implementation of 8-bit RISC MCU

  • Author

    Chen, Yanfen ; Wu, Wuchen ; Hou, Ligang ; Hu, Jie

  • Author_Institution
    VLSI & Integrated Syst. Lab., Beijing Univ. of Technol., Beijing, China
  • fYear
    2010
  • fDate
    22-24 Sept. 2010
  • Firstpage
    182
  • Lastpage
    185
  • Abstract
    An 8-bit Reduced Instruction Set Computer (RISC) Micro Controller Unit (MCU) has been implemented in this paper, including the design of pipeline and critical modules. The whole design uses two-stage pipeline which enables instruction-fetching modules and instruction-executing modules to work simultaneously. Its instruction set is compatible with PIC16F87XA instruction set and it achieves the execution speed of a single-cycle instruction (except for the program transfer instruction). The design is described by Verilog HDL, simulated by Modelsim and veriflcated by FPGA. The whole system can work normally and can achieve 40MHz frequency.
  • Keywords
    instruction sets; microcontrollers; pipeline processing; reduced instruction set computing; 8-bit RISC MCU; FPGA; PIC16F87XA instruction set; instruction executing modules; instruction fetching modules; micro controller unit; reduced instruction set computer; single cycle instruction; Clocks; Pipelines; Radiation detectors; Random access memory; Reduced instruction set computing; Registers; System-on-a-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronics and Electronics (PrimeAsia), 2010 Asia Pacific Conference on Postgraduate Research in
  • Conference_Location
    Shanghai
  • Print_ISBN
    978-1-4244-6735-8
  • Electronic_ISBN
    978-1-4244-6736-5
  • Type

    conf

  • DOI
    10.1109/PRIMEASIA.2010.5604930
  • Filename
    5604930