A 14-b 2MSPS Low Power Sigma-Delta ADC Using Feed-Forward Structure

Author

Lei, Wang ; Taotao, Yan ; Tingting, Mo ; Cui, Mao

Author_Institution

Shanghai Jiao Tong Univ., Shanghai, China

Volume

1

fYear

2011

fDate

6-7 Jan. 2011

Firstpage

3

Lastpage

5

Abstract

In this paper, a second-order 14 bit 2MSPS sigma-delta ADC used for data acquisition is proposed. The adopted feed-forward structure in SDM has reduced more than 50% output swing of integrator, leading to inherent low power operation compared with the conventional feedback topology. The proposed ADC, designed in TSMC 0.18μm CMOS technology, achieves 83.9dB peak SNR and 91dB SFDR with an over sampling rate of 256. Simulation result shows that the power consumption of analog SDM is only 2.1mW under a 1.8V supply.

Keywords

CMOS digital integrated circuits; low-power electronics; sigma-delta modulation; TSMC CMOS technology; conventional feedback topology; data acquisition; feedforward structure; low power operation; power 2.1 mW; second-order 2MSPS sigma-delta ADC; sigma-delta modulator; size 0.18 mum; voltage 1.8 V; word length 14 bit; CMOS technology; Capacitors; Integrated circuit modeling; Mathematical model; Quantization; Signal to noise ratio; Feed Forward Structure; Low Power; Sigma Delta ADC;

fLanguage

English

Publisher

ieee

Conference_Titel

Measuring Technology and Mechatronics Automation (ICMTMA), 2011 Third International Conference on

Conference_Location

Shangshai

Print_ISBN

978-1-4244-9010-3

Type

conf

DOI

10.1109/ICMTMA.2011.7

Filename

5720686