A novel input/output interface circuit with high voltage tolerant and PCI compliant capabilities

Author

Zhang, Jian ; Li, Xuewu ; Wen, Zhiping ; Chen, Lei ; Sun, Huabo ; Lin, Yanjun

Author_Institution

Beijing Microelectron. Technol. Inst., Beijing, China

fYear

2010

fDate

22-24 Sept. 2010

Firstpage

134

Lastpage

137

Abstract

This paper presents a novel input/output interface circuit for field programmable gate array (FPGA) devices, which has high voltage tolerant and PCI compliant capabilities. In the proposed circuit, dynamic gate and N-well bias technology is used to eliminate gate-oxide overstress and Pad to output supply (Vcco) leakage current when FPGA devices operate with high voltage input, and to ensure that over-voltage and under-voltage at Pad is avoidable when FPGA devices connect with PCI devices. The proposed circuit can be used as an interface IP and had been successfully applied in a 200MHz SRAM-based FPGA device using both 2.5V and 3.3V MOS transistors in a 0.25um CMOS process with dual-oxide option.

Keywords

CMOS logic circuits; MOSFET; SRAM chips; field programmable gate arrays; leakage currents; peripheral interfaces; CMOS process; MOS transistors; N-well bias technology; PCI compliant capabilities; SRAM-based FPGA device; dual-oxide option; dynamic gate technology; field programmable gate array devices; frequency 200 MHz; high-voltage tolerant capabilities; input-output interface circuit; output supply leakage current; size 0.25 mum; voltage 2.5 V to 3.3 V; Field programmable gate arrays; Integrated circuit modeling; Leakage current; Logic gates; MOSFETs; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics and Electronics (PrimeAsia), 2010 Asia Pacific Conference on Postgraduate Research in

Conference_Location

Shanghai

Print_ISBN

978-1-4244-6735-8

Electronic_ISBN

978-1-4244-6736-5

Type

conf

DOI

10.1109/PRIMEASIA.2010.5604942

Filename

5604942