Title :
Design and implementation of a 12-bit 40MS/s pipeline ADC
Author :
Dai, Lan ; Jin, Hui-Zhen ; Liu, Wen-Kai
Author_Institution :
Coll. of Inf. Eng., North China Univ. of Technol., Beijing, China
Abstract :
A 12-bits 40 MS/s pipeline analog-to-digital converter (ADC) in SMIC035um mixed-signal process is presented in this paper. The ADC adopts methods below to improve its performance, a novel bootstrapped switch is used to sample and hold circuit in order to improve the resolution of ADC, a residue amplifier with gain-boost to eliminate gain error. This ADC achieves a SFDR of 65 dB, a SNDR of 56 dB, a SNR of 56.9 dB, an ENOB of 9.1 bits with the resolution of all the measure instruments are below 10 bits.
Keywords :
amplifiers; analogue-digital conversion; SMIC035um mixed-signal process; bootstrapped switch; noise figure 56.9 dB to 65 dB; pipeline ADC; pipeline analog-to-digital converter; residue amplifier; Capacitors; Clocks; Converters; Gain; Pipelines; Switches; Switching circuits;
Conference_Titel :
Microelectronics and Electronics (PrimeAsia), 2010 Asia Pacific Conference on Postgraduate Research in
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-6735-8
Electronic_ISBN :
978-1-4244-6736-5
DOI :
10.1109/PRIMEASIA.2010.5604945
