DocumentCode
2614841
Title
Impact of Ceramic Packaging Anneal on the Reliability of Al Interconnects
Author
Lin, M.R. ; Yue, J.T.
Author_Institution
Advanced Technology Division, Advanced Micro Devices, 901 Thompson Place, Mail Stop 79, Sunnyvale, California 94088. (408) 749-2238
fYear
1986
fDate
31503
Firstpage
164
Lastpage
171
Abstract
Experimental results show conclusive evidence that stress induced metal voids and Si nodules (both of which originate during wafer processing) grow significantly after Ceramic Packaging (CDIP) glass sealing anneal. Furthermore, the growth of a metal void is almost always accompanied by Si precipitation in its immediate neighborhood. The combination of a metal void and an adjacent silicon nodule was observed to significantly reduce the net metal line cross-sectional area and is highly undesirable for interconnect reliability. In this paper the above phenomenon is fully explained and the effects of COIP anneal temperature profiles are examined.
Keywords
Ceramics; Glass; Integrated circuit packaging; Passivation; Plasma temperature; Postal services; Semiconductor films; Silicon; Simulated annealing; Thermal stresses;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium, 1986. 24th Annual
Conference_Location
Anaheim, CA, USA
ISSN
0735-0791
Type
conf
DOI
10.1109/IRPS.1986.362128
Filename
4208659
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