• DocumentCode
    2614941
  • Title

    Graph-based model for implementing sequential circuits

  • Author

    Abdelrazik, Mohamed B E

  • Author_Institution
    Brunel Univ., Uxbridge, UK
  • fYear
    1993
  • fDate
    3-6 May 1993
  • Firstpage
    2725
  • Abstract
    The author discusses a method for implementing sequential circuits. This method is based on extended Petri nets and their optimized model which is called a B-net. B-net has a unit block which is referred to as the Φ block. Each block has one place and two transitions {tp, tm}. The communication between unit blocks can be achieved by control lines which activate the transition. This model can be used to represent VLSI systems in all the levels of abstraction. Consequently, this method can be considered as a unified approach for design, verification and synthesis of VLSI systems
  • Keywords
    Petri nets; VLSI; logic CAD; logic design; sequential circuits; B-net; VLSI systems; abstraction; control lines; extended Petri nets; logic synthesis; optimized model; sequential circuits; unit block; verification; Circuit synthesis; Communication system control; Design automation; Logic; Minimization; Optimization methods; Petri nets; Process design; Sequential circuits; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
  • Conference_Location
    Chicago, IL
  • Print_ISBN
    0-7803-1281-3
  • Type

    conf

  • DOI
    10.1109/ISCAS.1993.394330
  • Filename
    394330