DocumentCode
2615004
Title
Towards a fully parallel stochastic Hopfield neural network
Author
Torralba, A. ; Colodro, F.
Author_Institution
Dpto. de Ingenieria Electron., Seville Univ., Spain
fYear
1993
fDate
3-6 May 1993
Firstpage
2741
Abstract
The authors present two digital circuits to implement a fully parallel stochastic Hopfield neural network (SHNN). In a parallel SHNN all the n × n stochastic signals s ij that pulse with probability proportional to the synapse inputs are simultaneously available. The proposed circuits calculate the function F i that accumulates the number of positive (negative) stochastic input pulses to neuron i
Keywords
Hopfield neural nets; neural chips; digital circuits; fully parallel neural net; stochastic Hopfield neural network; stochastic input pulses; stochastic signals; synapse inputs; Adders; CMOS technology; Convergence; Counting circuits; Hopfield neural networks; Logic circuits; Neurons; Propagation delay; Registers; Stochastic processes;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location
Chicago, IL
Print_ISBN
0-7803-1281-3
Type
conf
DOI
10.1109/ISCAS.1993.394334
Filename
394334
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