• DocumentCode
    2615134
  • Title

    Modeling soft error effects considering process variations

  • Author

    Zhao, Chong ; Dey, Sujit

  • Author_Institution
    Dept. of ECE, Univ. of California at San Diego, La Jolla, CA
  • fYear
    2007
  • fDate
    7-10 Oct. 2007
  • Firstpage
    376
  • Lastpage
    381
  • Abstract
    This paper addresses the aggregated effects of two types of variations that contribute to the reliability degradation. The first one is the increasing level of process variation; the second one is one particular type of environmental variation - the radiation-induced soft error. Their simultaneous presence can cause large negative performance impact. We present a statistical approach to model the generation and propagation of a transient soft error inside combinational circuits considering the existence of inter-die channel length variation in CMOS digital circuits. Experiment results have demonstrated that channel length variation can significantly aggravate the soft error effect, which can be accurately evaluated using the proposed methodology.
  • Keywords
    CMOS integrated circuits; combinational circuits; integrated circuit modelling; integrated circuit reliability; statistical analysis; CMOS digital circuits; combinational circuits; inter-die channel length variation; modeling soft error effects; radiation-induced soft error; reliability degradation; statistical approach; transient soft error; CMOS digital integrated circuits; Combinational circuits; Degradation; Digital circuits; Logic devices; Logic gates; Random variables; Semiconductor device modeling; Single event upset; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design, 2007. ICCD 2007. 25th International Conference on
  • Conference_Location
    Lake Tahoe, CA
  • ISSN
    1063-6404
  • Print_ISBN
    978-1-4244-1257-0
  • Electronic_ISBN
    1063-6404
  • Type

    conf

  • DOI
    10.1109/ICCD.2007.4601927
  • Filename
    4601927