DocumentCode
2615435
Title
A novel O(1) parallel deadlock detection algorithm and architecture for multi-unit resource systems
Author
Xiao, Xiang ; Lee, Jaehwan John
Author_Institution
ECE Dept., Indiana Univ.-Purdue Univ. Indianapolis, Indianapolis, IN
fYear
2007
fDate
7-10 Oct. 2007
Firstpage
480
Lastpage
487
Abstract
This paper introduces a novel O(1) parallel deadlock detection approach for multi-unit resource system-on-a-chips (SoCs), inspired by Kimpsilas method in O(1) detection as well as Shiupsilas method in parallel processing. Our contributions are (i) the first O(1) hardware deadlock detection and (ii) O(min(m, n)) preparation, both for multi-unit resource systems, where m and n are the number of processes and resources, respectively. O(min(m, n)), previously O(m times n), is achieved by performing all the searches for sink nodes for each and every resource in parallel in hardware over a matrix representing resource allocations as well as other auxiliary matrices. Our experiments demonstrate that deadlock detection always takes two clock cycles.
Keywords
computer architecture; concurrency control; matrix algebra; parallel processing; system-on-chip; O(1) hardware deadlock detection; O(min(m, n)) preparation; SoC; auxiliary matrices; hardware deadlock detection; multiunit resource system architecture; multiunit resource systems; parallel deadlock detection algorithm; system-on-a-chip; Clocks; Detection algorithms; Hardware; Parallel processing; Resource management; Runtime; System recovery; System-on-a-chip; Throughput; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design, 2007. ICCD 2007. 25th International Conference on
Conference_Location
Lake Tahoe, CA
ISSN
1063-6404
Print_ISBN
978-1-4244-1257-0
Electronic_ISBN
1063-6404
Type
conf
DOI
10.1109/ICCD.2007.4601942
Filename
4601942
Link To Document