• DocumentCode
    2615697
  • Title

    A fast algorithm for the generation of fault dictionary of linear analog circuits using adjoint network approach

  • Author

    Prasad, V.C. ; Pinjala, S.N.

  • Author_Institution
    Dept. of Electr. Eng., Indian Inst. of Technol., New Delhi, India
  • fYear
    1990
  • fDate
    1-3 May 1990
  • Firstpage
    37
  • Abstract
    A method for the generation of a fault dictionary of a linear analog circuit is presented. The method is based on the well-known adjoined network concept. For an (n+1) node network and for an order of n2 faults, the method is of O(n 3) time complexity. A minimum of O(n4) is required, showing that the method is extremely fast. Using n processors, the method takes O(1) time on a single instruction multiple-data shared memory parallel computer
  • Keywords
    analogue circuits; circuit analysis computing; computational complexity; fault location; linear network analysis; adjoined network concept; adjoint network approach; fault dictionary; linear analog circuits; node network; single instruction multiple-data shared memory parallel computer; time complexity; Analog circuits; Analytical models; Argon; Art; Circuit faults; Computational modeling; Dictionaries; Equations; Fault diagnosis; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1990., IEEE International Symposium on
  • Conference_Location
    New Orleans, LA
  • Type

    conf

  • DOI
    10.1109/ISCAS.1990.111907
  • Filename
    111907
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2615697