DocumentCode
2615710
Title
Data compressor decompressor IC
Author
Shah, Imran ; Johnson, Brian
Author_Institution
North American Philips Corp., Briarcliff Manor, NY, USA
fYear
1990
fDate
1-3 May 1990
Firstpage
41
Abstract
The data compressor decompressor (DCD) IC, a VLSI implementation of a version of the Lempel-Ziv (L-Z) compression algorithm, is discussed. The IC is suitable for high-speed, lossless compression of digital data such as text and images. The single-pass lossless compression scheme adapts to the statistics of the data being processed. The authors outline the L-Z compression method, illustrate a solution to its search requirement, and discuss the chip architecture and features
Keywords
VLSI; data compression; picture processing; signal processing equipment; L-Z compression method; Lempel-Ziv compression algorithm; VLSI; chip architecture; data compressor decompressor; images; lossless compression; search requirement; single-pass lossless compression scheme; text; Compression algorithms; Decoding; Digital integrated circuits; Encoding; High speed integrated circuits; Image coding; Laboratories; Memory; Statistics; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location
New Orleans, LA
Type
conf
DOI
10.1109/ISCAS.1990.111908
Filename
111908
Link To Document