Modeling C-V characteristics of deep sub - 0.1 micron mesoscale MOS devices

Modelling of mesoscale metal-oxide-semiconductor capacitors (MOSCAPs) with gate size of the order of a few tens of nanometers is made difficult by two major effects, one is charge confinement near the Si/SiO₂ interfaces, other one is fringe field at the edges of the devices. We use the TCAD simulations to calibrate the VQM model. This model shows that the fringe field effect serves to increase the capacitance of the MOSCAPs. Accumulation hole distribution near the gate of the device is explained by 2D classical and QM contour plots, it illustrates that how charge confinement near the interface forces the accumulated holes to penetrate deeper into the substrate.