Robust performance analysis of a controlled synchronous machine

In this work we investigate the robust performance of a controller which was originally proposed by M. Araki et al. (see Eighth IFAC World Congress, Kyoto, Japan, p.3123-35, 1981) to control a synchronous machine connected to an infinite bus through a transmission line. The objectives of the design by Araki et. al. were to ensure (1) satisfactory voltage regulation in the pre-fault state and (2) satisfactory transient response in the post-fault state. The pre-fault and post-fault states are characterized by two extreme values of the line reactance X_e, namely X_e1=0.5 and X_e2 =0.8. However, as pointed out by Araki et. al., the controller is required to exhibit a satisfactory performance for a variety of operating conditions. In this article we analyze the robustness of the proposed controller for an uncertain value of the line reactance X_e