DocumentCode
2616923
Title
A novel high current gain lateral PNP transistor on SOI for complementary bipolar technology
Author
Kumar, M. Jagadesh ; Parihar, Vinod
Author_Institution
Dept. of Electr. Eng., Indian Inst. of Technol., New Delhi, India
fYear
2003
fDate
10-12 Dec. 2003
Firstpage
268
Lastpage
269
Abstract
In order to improve driver performance of PNP transistor high current gain is required but PNP transistor exhibits low current gain due to poor hole mobility. In this paper a novel high current gain lateral PNP transistor on SOI for complementary bipolar technology is presented. The paper also presents the demonstration of a significant current gain enhancement in a PNP transistor using simple surface accumulation layer transistor that is compatible with standard BiCMOS technology.
Keywords
accumulation layers; bipolar transistors; silicon-on-insulator; BiCMOS technology; SOI; Si; bipolar CMOS technology; complementary bipolar technology; current gain enhancement; high current gain lateral PNP transistor; silicon-on-insulator; surface accumulation layer transistor; Bipolar transistor circuits; Contacts; Cutoff frequency; Doping profiles; Driver circuits; Electron emission; Feedback amplifiers; Feedback circuits; Mirrors; Silicon germanium;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Device Research Symposium, 2003 International
Print_ISBN
0-7803-8139-4
Type
conf
DOI
10.1109/ISDRS.2003.1272092
Filename
1272092
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