Title :
Statistical method of noise estimation in a synchronous system
Author_Institution :
IBM, Poughkeepsie, NY, USA
Abstract :
A process to analyze coupled noise within a synchronous digital machine is described. A method that considers the spatial relationship of the noise generating components, as well as the timing of the incident pulses, is discussed. Consideration is given to factors such as path delay, reflected noise, driver slew rate, noise pulse width, termination, net topology, noise from other sources and the probabilistic nature of the time when a signal is launched, as well as other parameters. The result is a probability distribution for noise on the circuit and a noise versus time envelope. The method is more accurate than previous techniques due to timing and statistical considerations. A multilayer multichip package is considered. Treatment of the resultant output is discussed and compared to simpler deterministic methods. The failure criterion, critical time periods and some sources of errors are also considered
Keywords :
circuit layout; circuit noise; fault diagnosis; logic testing; network topology; packaging; statistical analysis; coupled noise analysis; deterministic methods; driver slew rate; failure criterion; multilayer multichip package; net topology; noise estimation; noise generating components; noise pulse width; path delay; probability distribution; reflected noise; statistical method; synchronous digital machine; termination; Circuit noise; Circuit topology; Delay effects; Driver circuits; Noise generators; Probability distribution; Pulse generation; Space vector pulse width modulation; Statistical analysis; Timing;
Conference_Titel :
Electrical Performance of Electronic Packaging, 1993
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-1427-1
DOI :
10.1109/EPEP.1993.394587