DocumentCode
2617570
Title
Scaling and reliability of deeply scaled SOI CMOS
Author
Ioannou, Dimitris E.
Author_Institution
Dept. of Electr. & Comput. Eng., George Mason Univ., Fairfax, VA, USA
fYear
2003
fDate
10-12 Dec. 2003
Firstpage
356
Abstract
This paper presents the latest results from the literature, concerning the performance and reliability of extremely scaled FD transistors. Numerical simulations showed that scalability of FD-SOI is achievable by using exotic gate materials to control the threshold voltage and lowly doped/undoped channels and thinning the silicon film and buried oxide to control the short channel effects. As the film thickness is reduced the effective junction depth is reduced which strengthens the front gate control of the back surface potential and improves the short channel effects. The hot carrier reliability of SOI CMOS was unknown as carriers can get hot at very low voltages and channel coupling and floating body complicates the effects of the induced degradation.
Keywords
MOSFET; semiconductor device models; semiconductor device reliability; silicon-on-insulator; Si; back surface potential; carrier degradation; channel coupling; deeply scaled SOI CMOS; exotic gate material; gate control; hot carrier reliability; numerical simulation; semiconductor device reliability; short channel effects; silicon-on-insulator; threshold voltage; Degradation; Hot carriers; Low voltage; Numerical simulation; Scalability; Semiconductor films; Silicon; Thickness control; Threshold voltage; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Device Research Symposium, 2003 International
Print_ISBN
0-7803-8139-4
Type
conf
DOI
10.1109/ISDRS.2003.1272132
Filename
1272132
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